Priority framework for a computing device
US10191868B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 12, 2018 |
| Grant date | Jan 29, 2019 |
| Priority date | — |
| Expiry date | Mar 12, 2038 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Proving for a framework for propagating priorities to a memory subsystem in a computing system environment is disclosed herein. By way of example, a memory access handler is provided for managing memory access requests and determining associated priorities. The memory access handler includes logic configured for propagating memory requests and the associated priorities to lower levels of a computer hierarchy. A memory subsystem receives the memory access requests and the priorities.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.