Patent · US Active

Interleaved parallel circuit, integrated power module and integrated power chip

US10198020B2 · kind B2 · utility

3Cited by
6References
13Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 10, 2017
Grant dateFeb 5, 2019
Priority date
Expiry dateApr 10, 2037

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02B70/10
  • WIPO fieldControl
  • WIPO sectorInstruments

Abstract

The present disclosure provides an interleaved parallel circuit, an integrated power module and an integrated power chip. The interleaved parallel circuit includes a first bridge arm and a second bridge arm at least partly formed in a wafer containing a plurality of first cell groups and a plurality of second cell groups. The plurality of first cell groups are configured to form the first upper bridge-arm switch and the plurality of second cell groups are configured to form the second upper bridge-arm switch, or the plurality of first cell groups are configured to form the first lower bridge-arm switch and the plurality of second cell groups are configured to form the second lower bridge-arm switch. The plurality of first cell groups and the plurality of second cell groups are switched on and off in an interleaved mode.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.