Three-terminal MRAM with ac write-assist for low read disturb
US10199083B1 · kind B1 · utility
11Cited by
143References
33Claims
0Family size
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Key dates
| Filing date | Dec 29, 2017 |
| Grant date | Feb 5, 2019 |
| Priority date | — |
| Expiry date | Dec 29, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/85
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and structures useful for magnetoresistive random-access memory (MRAM) are disclosed. The MRAM device has a magnetic tunnel junction stack having a significantly improved performance of the free layer in the magnetic tunnel junction structure. The MRAM device also utilizes a three-terminal structure, thereby allowing efficient writing of the bit without a concomitant increase in read disturb.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.