Spin Transfer Technologies, Inc.
24Patents
24Active
24Granted
54Portfolio score
Filing activity: Jul 25, 2014 → Jan 8, 2018
Most-cited patents
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9406876B2 | Method for manufacturing MTJ memory device | Electricity | 97 | Active |
| US9263667B1 | Method for manufacturing MTJ memory device | Electricity | 92 | Active |
| US9741926B1 | Memory cell having magnetic tunnel junction and thermal stability enhancement layer | Electricity | 88 | Active |
| US9853206B2 | Precessional spin current structure for MRAM | Electricity | 85 | Active |
| US9337412B2 | Magnetic tunnel junction structure for MRAM device | Emerging Cross-Sectional Technologies | 79 | Active |
| US9773974B2 | Polishing stop layer(s) for processing arrays of semiconductor elements | Electricity | 71 | Active |
| US9728712B2 | Spin transfer torque structure for MRAM devices having a spin current injection capping layer | Physics | 70 | Active |
| US10115446B1 | Spin transfer torque MRAM device with error buffer | Physics | 50 | Active |
| US10163479B2 | Method and apparatus for bipolar memory write-verify | Physics | 47 | Active |
| US10026892B2 | Precessional spin current structure for MRAM | Electricity | 26 | Active |
| US10032978B1 | MRAM with reduced stray magnetic fields | Electricity | 25 | Active |
| US10199083B1 | Three-terminal MRAM with ac write-assist for low read disturb | Electricity | 11 | Active |
| US10186308B1 | Magnetic random access memory having improved reliability through thermal cladding | Electricity | 9 | Active |
| US10192789B1 | Methods of fabricating dual threshold voltage devices | Electricity | 7 | Active |
| US10192984B1 | Dual threshold voltage devices with stacked gates | Electricity | 4 | Active |
| US10186551B1 | Buried tap for a vertical transistor used with a perpendicular magnetic tunnel junction (PMTJ) | Electricity | 4 | Active |
| US10192788B1 | Methods of fabricating dual threshold voltage devices with stacked gates | Electricity | 4 | Active |
| US10192787B1 | Methods of fabricating contacts for cylindrical devices | Electricity | 3 | Active |
| US10147872B2 | Spin transfer torque structure for MRAM devices having a spin current injection capping layer | Physics | 3 | Active |
| US10141499B1 | Perpendicular magnetic tunnel junction device with offset precessional spin current layer | Electricity | 2 | Active |
| US10211395B1 | Method for combining NVM class and SRAM class MRAM elements on the same chip | Electricity | 2 | Active |
| US10192602B2 | Smart cache design to prevent overflow for a memory device with a dynamic redundancy register | Physics | 1 | Active |
| US10381553B2 | Memory cell having magnetic tunnel junction and thermal stability enhancement layer | Electricity | 1 | Active |
| US10192601B2 | Memory instruction pipeline with an additional write stage in a memory device that uses dynamic redundancy registers | Physics | 1 | Active |
Source: USPTO / EPO open patent data. Counts and citation impact are objective bibliographic measures.