Sense amplifier circuit for reading data in a flash memory cell
US10199112B1 · kind B1 · utility
5Cited by
0References
78Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 25, 2017 |
| Grant date | Feb 5, 2019 |
| Priority date | — |
| Expiry date | Aug 25, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0433
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Numerous embodiments for an improved sense amplifier circuit for reading data in a flash memory cell are disclosed. The embodiments each compare current or voltage measurements from a data block with a reference block to determine the value stored in the selected memory cell in the data block. The use of one or more localized boost circuits allow the embodiments to utilize lower operating voltages than prior art sense amplifier circuits, resulting in reduced power consumption.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.