Semiconductor devices and methods of manufacturing the same
US10199263B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 7, 2017 |
| Grant date | Feb 5, 2019 |
| Priority date | — |
| Expiry date | Jun 13, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/53266
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a first insulating interlayer on a first region of a substrate and a second insulating interlayer on a second region of the substrate, a plurality of first wiring structures on the first insulating interlayer, the first wiring structures being spaced apart from each other, a plurality of second wiring structures filling a plurality of trenches on the second insulating interlayer, respectively, an insulation capping structure selectively on a surface of the first insulating interlayer between the first wiring structures and on a sidewall and an upper surface of each of the first wiring structures, the insulation capping structure including an insulating material, a third insulating interlayer on the first and second wiring structures, and an air gap among the first wiring structures under the third insulating interlayer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.