Plastic-packaged semiconductor device having wires with polymerized insulating layer
US10199348B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 27, 2016 |
| Grant date | Feb 5, 2019 |
| Priority date | — |
| Expiry date | Jun 27, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3862
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The assembly of a chip (101) attached to a substrate (103) with wires (201) spanning from the chip to the substrate is loaded in a heated cavity (402) of a mold; the wire surfaces are coated with an adsorbed layer of molecules of a heterocyclic compound (302); a pressure chamber (404) of the mold is loaded with a solid pellet (410) of a packaging material including a polymerizable resin, the chamber being connected to the cavity; the vapor of resin molecules is allowed to spread from the chamber to the assembly inside the cavity during the time interval needed to heat the solid pellet for rendering it semi-liquid and to pressurize it through runners (403) before filling the mold cavity, whereby the resin molecules arriving in the cavity are cross-linked by the adsorbed heterocyclic compound molecules into an electrically insulating at least one monolayer of polymeric structures on the wire surfaces.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.