Semiconductor memory device
US10199498B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 12, 2016 |
| Grant date | Feb 5, 2019 |
| Priority date | — |
| Expiry date | Sep 24, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/50
Abstract
According to one embodiment, a semiconductor memory device includes a substrate, a stacked body, a pillar structure, at least one charge storage film, and a first electrode. The stacked body includes electrode films stacked separately from each other. The pillar structure is provided in the stacked body and includes a semiconductor layer extending in stacking direction of the stacked body. The charge storage film is provided between the semiconductor layer and the electrode films. The first electrode is provided in the stacked body, spreads in the stacking direction and a first direction along a surface of the substrate, and contacting the substrate. The first electrode includes a first portion containing a material having conductivity and a second portion containing a material that a linear expansion coefficient is lower than a linear expansion coefficient of silicon, and positioned at a substrate side than the first portion in the stacking direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.