Patent · US Active

Circuit substrate and semiconductor package structure

US10204852B2 · kind B2 · utility

7Cited by

16References

9Claims

0Family size

Assignee

VIA ALLIANCE SEMICONDUCTOR CO., LTD. · CN

Inventors

Yeh Hsu · Taipei, TW
Chen-Yueh Kung · New Taipei, TW

Key dates

Filing date	Feb 3, 2017
Grant date	Feb 12, 2019
Priority date	—
Expiry date	Feb 3, 2037

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2224/81447
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A circuit substrate for a chip bonding thereon includes a core substrate having a chip-side surface and a bump-side surface opposite to the chip-side surface, a first through via plug passing through the core substrate, a pad disposed on the bump-side surface, in contact with the first through via plug, and a first thickness enhancing conductive pattern disposed on a surface of the pad, which is away from the bump-side surface.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.