Patent · US Active

Method of fabrication of a semiconductor substrate having at least a tensilely strained semiconductor portion

US10205021B1 · kind B1 · utility

4Cited by

1References

15Claims

0Family size

Assignee

COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES · FR

Inventor

Shay Reboh · Grenoble, FR

Key dates

Filing date	Dec 22, 2017
Grant date	Feb 12, 2019
Priority date	—
Expiry date	Dec 22, 2037

Classification

Technology area (CPC H)Electricity
CPC primaryH10D84/038
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

Method of fabrication of a semiconductor substrate including fabrication of a semiconducting layer such that a first part of the semiconducting layer comprises a compressively strained semiconductor and such that a second part of the semiconducting layer comprises a material different from the compressively strained semiconductor. The second part of the semiconducting layer is located in a principal plane of the semiconducting layer in contact with at least two opposite edges of the first part of the semiconducting layer. The method further includes etching of a trench through the semiconducting layer, delimiting the first part of the semiconducting layer and portions of the second part of the semiconducting layer located in contact with the opposite edges of the first part of the semiconducting layer, relative to the remaining part of the semiconducting layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.