Semiconductor device, semiconductor system, and method of operating the semiconductor device
US10209734B2 · kind B2 · utility
3Cited by
17References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Jan 25, 2017 |
| Grant date | Feb 19, 2019 |
| Priority date | — |
| Expiry date | Jun 13, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F21/725
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A clock management unit (CMU) includes a first clock control circuit controlling a first clock source, a second clock control circuit sending a first clock request to the first clock control circuit in response to an intellectual property (IP) block clock request from an IP block and controlling a second clock source, and a CMU controller. The second clock source receives a clock signal from the first clock source. A power management unit (PMU) sends a PMU clock request to the CMU controller. The CMU provides the clock signal to the IP block in response to the PMU clock request.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.