Inventor · Singapore, SG

Jae Gon Lee

109Patents
9h-index
147Co-inventors
83Inventor score

Filing activity: Dec 3, 1996 → Sep 21, 2023

Most-cited inventions

PatentTitleAreaCited byStatus
US7867835B2 Integrated circuit system for suppressing short channel effects Electricity 115 Active
US6946349B1 Method for integrating a SONOS gate oxide transistor into a logic/analog integrated circuit having several gate oxide thicknesses Emerging Cross-Sectional Technologies 80 Expired
US8492235B2 FinFET with stressors Electricity 22 Active
US9847391B1 Stacked nanosheet field-effect transistor with diode isolation Electricity 21 Active
US8726047B2 System on chip, devices having the same, and method for power control of the SOC Emerging Cross-Sectional Technologies 16 Active
US8889494B2 Finfet Electricity 13 Active
US8748271B2 LDMOS with improved breakdown voltage Electricity 11 Active
US9541992B2 Method of performing dynamic voltage and frequency scaling operation, application processor performing method, and mobile device comprising application processor Emerging Cross-Sectional Technologies 10 Active
US8338245B2 Integrated circuit system employing stress-engineered spacers Electricity 9 Active
US8735984B2 FinFET with novel body contact for multiple Vt applications Electricity 9 Active
US8138053B2 Method of forming source and drain of field-effect-transistor and structure thereof Electricity 9 Active
US8349692B2 Channel surface technique for fabrication of FinFET devices Electricity 8 Active
US8928385B2 Methods of controlling clocks in system on chip including function blocks, systems on chips and semiconductor systems including the same Emerging Cross-Sectional Technologies 8 Active
US7727856B2 Selective STI stress relaxation through ion implantation Electricity 7 Active
US5754360A Magnetic recording/reproducing apparatus Physics 7 Expired
US10296065B2 Clock management using full handshaking Emerging Cross-Sectional Technologies 6 Active
US9219147B2 LDMOS with improved breakdown voltage Electricity 5 Active
US8896072B2 Channel surface technique for fabrication of FinFET devices Electricity 5 Active
US8975708B2 Semiconductor device with reduced contact resistance and method of manufacturing thereof Electricity 5 Active
US9406801B2 FinFET Electricity 4 Active
US9034711B2 LDMOS with two gate stacks having different work functions for improved breakdown voltage Electricity 4 Active
US9054680B2 Methods of controlling clocks in system on chip including function blocks, systems on chips and semiconductor systems including the same Emerging Cross-Sectional Technologies 4 Active
US10553707B1 FinFETs having gates parallel to fins Electricity 4 Active
US10090204B1 Vertical FINFET structure and methods of forming same Electricity 4 Active
US8674457B2 Methods to reduce gate contact resistance for AC reff reduction Electricity 4 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.