Patent · US Active

Semiconductor structures and fabrication methods thereof

US10211062B2 · kind B2 · utility

2Cited by
1References
15Claims
0Family size

Assignees

Inventors

Key dates

Filing dateJan 16, 2018
Grant dateFeb 19, 2019
Priority date
Expiry dateJan 16, 2038

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/0002
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method for fabricating a semiconductor structure includes providing a base substrate, forming a plurality of core layers on the base substrate, forming a sidewall spacer film on the base substrate covering top and sidewall surfaces of the core layers, and forming a sidewall spacer layer by removing a portion of the sidewall spacer film formed above the top surface of the core layers. The sidewall spacer layer includes a first portion having a first thickness on the sidewall surfaces of the core layers, and a second portion having a second thickness on the base substrate. The method further includes removing the plurality of core layers after forming the sidewall spacer layer, removing the second portion of the sidewall spacer layer from the base substrate after removing the core layers, and using the first portion of the sidewall spacer layer as a hard mask layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.