Three level gate monitoring

US10215795B1 · kind B1 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Markus Zannoth · Munich, DE
• Jaafar Mejri · Ottobrunn, DE

Key dates

• Filing date: Apr 13, 2018
• Grant date: Feb 26, 2019
• Expiry date: Apr 13, 2038

Classification

• Technology area (CPC H): Electricity
• CPC primary: H03K2017/0806
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

A method of monitoring a gate of a transistor includes monitoring a gate voltage of the transistor; measuring a first time difference between when a gate control signal is asserted and when the gate voltage of the transistor crosses a first voltage threshold based on the monitoring; measuring a second time difference between when the gate voltage of the transistor crosses the first voltage threshold and when the gate voltage of the transistor crosses a second voltage threshold based on the monitoring; and determining whether the first time difference falls within a first time window, and whether the second time difference falls within a second time window.