Chip and method for detecting a change of a stored data vector
US10216929B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 30, 2016 |
| Grant date | Feb 26, 2019 |
| Priority date | — |
| Expiry date | Jun 8, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0619
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A chip is provided having processing circuits, each processing circuit configured to process a data vector to be stored according to a multiplication of the vector by a processing matrix, the sum of the processing matrices corresponding to the non-unit-matrix part of a generator matrix of a predetermined linear code in reduced form, a summing circuit to sum the results of the processing operations of the data vector, a storage circuit to store the data vector to be stored together with the sum of the generated results as one data word in a memory, a read-out circuit to read the stored data word out of the memory, and a decoding circuit to check whether the data word read out is a valid code word of the linear code and to output an error signal if the data word is not a valid code word of the linear code.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.