Shift register unit, gate driving circuit and driving method thereof, and display apparatus
US10217391B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 18, 2016 |
| Grant date | Feb 26, 2019 |
| Priority date | — |
| Expiry date | Dec 26, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0286
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Disclosed is a shift register unit, a gate driving circuit and a driving method, as well as a display apparatus. The shift register unit has a working cycle including an input phase, an output phase, a reset phase and a maintaining phase. In the reset phase, a clock signal is transmitted to an output terminal to pull a voltage of the output terminal down to a reference voltage, and the pulled-down voltage of the output terminal is subsequently changed from the reference voltage to a gate-off voltage. In the maintaining phase, the voltage of the output terminal is maintained at the gate-off voltage. The reference voltage is smaller than the gate-off voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.