High bandwidth routing for die to die interposer and on-chip applications
US10217708B1 · kind B1 · utility
3Cited by
12References
11Claims
0Family size
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Inventors
Key dates
| Filing date | Dec 18, 2017 |
| Grant date | Feb 26, 2019 |
| Priority date | — |
| Expiry date | Dec 18, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19041
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Routing structures including signal routing between die areas is described. In an embodiment, routing structures include signal lines with a characteristic thickness that is greater than a width. The signal lines may be twisted, and run directly underneath pads.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.