Semiconductor device having trenches with enlarged width regions
US10217830B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 8, 2016 |
| Grant date | Feb 26, 2019 |
| Priority date | — |
| Expiry date | Dec 8, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/63
Abstract
A semiconductor device includes a plurality of trenches extending into a semiconductor substrate. Each trench comprises a plurality of enlarged width regions distributed along the trench. At least one electrically conductive trench structure is located in each trench. The semiconductor device comprises an electrically insulating layer arranged between the semiconductor substrate and an electrode structure. The semiconductor device comprises a vertical electrically conductive structure extending through the electrically insulating layer. The vertical electrically conductive structure forms an electrically connection between the electrode structure and an electrically conductive trench structure located in a first trench of at a first enlarged width region. The electrically insulating layer is arranged between a second enlarged width region of the plurality of enlarged width regions of the first trench and an electrode structure above the second enlarged width region without any vertical electrical connections through the electrically insulating layer at the second enlarged width region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.