Patent · US Active

Systems and methods providing a low-power mode for serial links

US10218391B1 · kind B1 · utility

0Cited by
6References
18Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 2, 2017
Grant dateFeb 26, 2019
Priority date
Expiry dateAug 2, 2037

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02D30/50
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Systems and methods to provide a low-power mode for serial links are disclosed. One embodiment of such a system includes a transmitter coupled to a link; a receiver coupled to the link and configured to receive signals over the link from the transmitter; a transmit control module configured to cause the transmitter to enter and exit a low-power mode; and a clock module coupled to the transmitter and configured to provide a clock signal to the transmitter, wherein the clock module is further configured to provide the clock signal as a divided clock signal to the transmitter when the transmitter is in the low-power mode, further wherein the divided clock signal has a same phase as the clock signal before entry into the low-power mode.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.