Robert M. Bunce
22Patents
6h-index
24Co-inventors
69Inventor score
Filing activity: Mar 31, 1995 → Jun 2, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6836808B2 | Pipelined packet processing | Electricity | 161 | Expired |
| US6877048B2 | Dynamic memory allocation between inbound and outbound buffers in a protocol handler | Electricity | 23 | Expired |
| US6834365B2 | Integrated real-time data tracing with low pin count output | Physics | 18 | Expired |
| US7072970B2 | Programmable network protocol handler architecture | Physics | 15 | Expired |
| US7249206B2 | Dynamic memory allocation between inbound and outbound buffers in a protocol handler | Electricity | 7 | Expired |
| US5757682A | Parallel calculation of exponent and sticky bit during normalization | Physics | 6 | Expired |
| US5627774A | Parallel calculation of exponent and sticky bit during normalization | Physics | 5 | Expired |
| US5742535A | Parallel calculation of exponent and sticky bit during normalization | Physics | 2 | Expired |
| US11160369B2 | Shelving system | Physics | 2 | Active |
| US7457895B2 | Dynamic memory allocation between inbound and outbound buffers in a protocol handler | Electricity | 1 | Active |
| US5619443A | Carry select and input select adder for late arriving data | Physics | 1 | Expired |
| US6987761B2 | Inbound data stream controller with pre-recognition of frame sequence | Electricity | 1 | Expired |
| US7739427B2 | Dynamic memory allocation between inbound and outbound buffers in a protocol handler | Electricity | 1 | Active |
| US5742536A | Parallel calculation of exponent and sticky bit during normalization | Physics | 1 | Expired |
| US5654911A | Carry select and input select adder for late arriving data | Physics | 1 | Expired |
| US10218391B1 | Systems and methods providing a low-power mode for serial links | Emerging Cross-Sectional Technologies | 0 | Active |
| US12353764B1 | Single cycle request arbiter | Physics | 0 | Active |
| US9935762B2 | Apparatus and method for centering clock signal in cumulative data eye of parallel data in clock forwarded links | Electricity | 0 | Active |
| US7675966B2 | On-chip detection and measurement of data lock in a high-speed serial data link | Physics | 0 | Active |
| US11502989B2 | Method of configuring a storage system | Electricity | 0 | Active |
| US12273269B1 | Selective mesh routing through non-adjacent nodes | Electricity | 0 | Active |
| US10411873B1 | Clock data recovery broadcast for multi-lane SerDes | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.