Method and apparatus for preventing bank conflict in memory
US10223269B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Feb 26, 2015 |
| Grant date | Mar 5, 2019 |
| Priority date | — |
| Expiry date | Apr 28, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/608
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of preventing a bank conflict in a memory includes determining processing timing of each of threads of function units to access a first memory bank in which occurrence of a bank conflict is expected, setting a variable latency of each of the threads for sequential access of the threads according to the determined processing timing, sequentially storing the threads in a data memory queue according to the determined processing timing, and performing an operation by allowing the threads stored in the data memory queue to sequentially access the first memory bank whenever the variable latency of each of the threads passes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.