Superjunction semiconductor device having a superstructure
US10224394B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 2, 2018 |
| Grant date | Mar 5, 2019 |
| Priority date | — |
| Expiry date | Feb 2, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D12/461
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
According to an embodiment of a semiconductor substrate, the semiconductor substrate includes a superjunction structure in a device region of a semiconductor layer and an alignment mark in a kerf region of the semiconductor layer. The superjunction structure includes first regions and second regions of opposite conductivity types, the first and the second regions alternating along at least one horizontal direction. The alignment mark includes a vertical step formed by an alignment structure projecting or recessed from a main surface of the semiconductor layer. The alignment structure is of a material of the first regions of the superjunction structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.