On-die impedance calibration
US10224928B1 · kind B1 · utility
3Cited by
10References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 23, 2018 |
| Grant date | Mar 5, 2019 |
| Priority date | — |
| Expiry date | Mar 23, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2254
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Apparatuses, systems, methods, and computer program products are disclosed for on-die impedance calibration. A calibration circuit determines a digital compensation value for an input/output driver. A calibration adjustment circuit provides a digital compensation value to a calibration circuit to produce an analog output corresponding to the digital compensation value. A feedback circuit provides an analog output as feedback to a calibration circuit to produce an analog compensation value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.