Semiconductor device package and a method of manufacturing the same
US10229859B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 19, 2017 |
| Grant date | Mar 12, 2019 |
| Priority date | — |
| Expiry date | Jul 19, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
At least some embodiments of the present disclosure relate to a semiconductor device package. The semiconductor device package includes a first substrate, an electrical component disposed on the first substrate, a second substrate disposed over the electrical component, an adhesive layer, a spacer, and an encapsulation layer. The adhesive layer is disposed between the electrical component and the second substrate. The spacer directly contacts both the adhesive layer and the second substrate. The encapsulation layer is disposed between the first substrate and the second substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.