Constant fraction integer multiplication
US10235136B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | May 26, 2017 |
| Grant date | Mar 19, 2019 |
| Priority date | — |
| Expiry date | May 26, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2207/5356
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A binary logic circuit is provided for determining a rounded value of where p and q are coprime constant integers with p<q and q≠2i, i is any integer, and x is an integer variable between 0 and integer M where M≥2q, the binary logic circuit implementing in hardware the optimal solution of the multiply-add operation where a, b and k are fixed integers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.