Inventor · Taylors, SC, US

Thomas Rose

24Patents
4h-index
9Co-inventors
56Inventor score

Filing activity: Oct 13, 1987 → Nov 13, 2023

Most-cited inventions

PatentTitleAreaCited byStatus
US4858396A Gutter Fixed Constructions 24 Expired
US9753693B2 Constant fraction integer multiplication Physics 9 Active
US5299966A Projectile toy apparatus Human Necessities 8 Expired
USD301165S Gutter General 5 Expired
US8943447B2 Method and apparatus for synthesising a sum of addends operation and an integrated circuit Physics 2 Active
US10409556B2 Division synthesis Physics 1 Active
US10877732B2 Performing constant modulo arithmetic Physics 1 Active
US12282751B2 Performing constant modulo arithmetic Physics 0 Active
US9342270B2 Conversion of a normalized n-bit value into a normalized m-bit value Physics 0 Active
US11429389B2 Data selection for a processor pipeline using multiple supply lines Physics 0 Active
US11409500B2 Performing constant modulo arithmetic Physics 0 Active
US11531522B2 Selecting an ith largest or a pth smallest number from a set of n m-bit numbers Physics 0 Active
US12298924B2 Sorting memory address requests for parallel memory access using input address match masks Physics 0 Active
US11249925B2 Sorting memory address requests for parallel memory access using input address match masks Physics 0 Active
US9163089B2 Enhancement of protein production yield mediated by a fast shuttling CDC42 GTPase Chemistry; Metallurgy 0 Active
US10175943B2 Sorting numbers in hardware Electricity 0 Active
US10691416B2 Performing constant modulo arithmetic Physics 0 Active
US11422802B2 Iterative estimation hardware Physics 0 Active
US10235136B2 Constant fraction integer multiplication Physics 0 Active
US10372420B2 Performing constant modulo arithmetic Physics 0 Active
US12086566B2 Selecting an Ith largest or a Pth smallest number from a set of n m-bit numbers Physics 0 Active
US11816044B2 Sorting memory address requests for parallel memory access using input address match masks Physics 0 Active
US10877760B2 Selection of data for processor pipelines using multiple supply lines wherein in one of two modes the same data is supplied to both inputs of a processing element Physics 0 Active
US10628341B2 Sorting memory address requests for parallel memory access Physics 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.