Element chip manufacturing method
US10236266B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 15, 2017 |
| Grant date | Mar 19, 2019 |
| Priority date | — |
| Expiry date | May 15, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/13147
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An element chip manufacturing method includes a preparation process of preparing a substrate which includes a first surface having an exposed bump and a second surface opposite to the first surface and includes a plurality of element regions defined by dividing regions, a bump embedding process of embedding at least a head top part of the bump into the adhesive layer, a mask forming process of forming a mask in the second surface. The method for manufacturing the element chip includes a holding process of arranging the first surface to oppose a holding tape supported on a frame and holding the substrate on the holding tape, a placement process of placing the substrate on a stage provided inside of a plasma processing apparatus through the holding tape, after the mask forming process and the holding process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.