Selective deposition utilizing sacrificial blocking layers for semiconductor devices
US10243080B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 19, 2014 |
| Grant date | Mar 26, 2019 |
| Priority date | — |
| Expiry date | Dec 19, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/49838
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods of selectively depositing high-K gate dielectric on a semiconductor structure are disclosed. The method includes providing a semiconductor structure disposed above a semiconductor substrate. The semiconductor structure is disposed beside an isolation sidewall. A sacrificial blocking layer is then selectively deposited on the isolation sidewall and not on the semiconductor structure. Thereafter, a high-K gate dielectric is deposited on the semiconductor structure, but not on the sacrificial blocking layer. Properties of the sacrificial blocking layer prevent deposition of oxide material on its surface. A thermal treatment is then performed to remove the sacrificial blocking layer, thereby forming a high-K gate dielectric only on the semiconductor structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.