Patent · US Active

System and method for power management

US10248183B2 · kind B2 · utility

0Cited by

2References

12Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Jennifer Chin · Bayan Lepas, MY
Su Wei Lim · Klang, MY
Poh Thiam Teoh · Bandar Baru Sungai Buloh, MY
Ting Lok Song · Bayan Lepas, MY
Sun Zheng E · Balik Pulau, MY
Say Cheong Gan · Melaka City, MY
Sujea Lim · Bintangor, MY
Ming Yi Lim · Air Itam, MY

Key dates

Filing date	Dec 6, 2016
Grant date	Apr 2, 2019
Priority date	—
Expiry date	May 5, 2037

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY02D10/00
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Particular embodiments described herein can offer a method for managing power for at least one processor that includes evaluating a plurality of ports associated with an electronic device; determining that a particular pin associated with at least one of the ports is not receiving a signal; disabling a squelch function associated with the electronic device; and gating power associated with a physical layer (PHY) of the electronic device.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.