Su Wei Lim
45Patents
7h-index
54Co-inventors
68Inventor score
Filing activity: Oct 29, 2004 → Aug 12, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8706944B2 | Dual bus standard switching bus controller | Physics | 10 | Active |
| US9262360B2 | Architected protocol for changing link operating mode | Electricity | 9 | Active |
| US8892800B2 | Apparatuses for inter-component communication including slave component initiated transaction | Physics | 8 | Active |
| US7594042B2 | Effective caching mechanism with comparator coupled to programmable registers to store plurality of thresholds in order to determine when to throttle memory requests | Physics | 7 | Active |
| US9946676B2 | Multichip package link | Physics | 7 | Active |
| US9086966B2 | Systems, apparatuses, and methods for handling timeouts | Emerging Cross-Sectional Technologies | 7 | Active |
| US9152596B2 | Architected protocol for changing link operating mode | Electricity | 7 | Active |
| US8601198B2 | Controllable transaction synchronization for merging peripheral devices | Physics | 6 | Active |
| US9563260B2 | Systems, apparatuses, and methods for synchronizing port entry into a low power state | Emerging Cross-Sectional Technologies | 6 | Active |
| US9513662B2 | System and method for power management | Emerging Cross-Sectional Technologies | 5 | Active |
| US9124455B1 | Link equalization mechanism | Electricity | 4 | Active |
| US9575552B2 | Device, method and system for operation of a low power PHY with a PCIe protocol stack | Emerging Cross-Sectional Technologies | 4 | Active |
| US9274987B2 | Inter-component communication including slave component initiated transaction | Physics | 3 | Active |
| US10311000B2 | Integrated universal serial bus (USB) type-C switching | Physics | 3 | Active |
| US9418030B2 | Inter-component communication including posted and non-posted transactions | Physics | 3 | Active |
| US11533170B2 | Hardware mechanisms for link encryption | Electricity | 2 | Active |
| US9753529B2 | Systems, apparatuses, and methods for synchronizing port entry into a low power status | Emerging Cross-Sectional Technologies | 2 | Active |
| US9588922B2 | Techniques for inter-component communication based on a state of a chip select pin | Physics | 2 | Active |
| US10776302B2 | Virtualized link states of multiple protocol layer package interconnects | Emerging Cross-Sectional Technologies | 2 | Active |
| US9268568B2 | Method and apparatus for agent interfacing with pipeline backbone to locally handle transactions while obeying ordering rule | Electricity | 1 | Active |
| US10209911B2 | Techniques enabling low power states for a communications port | Emerging Cross-Sectional Technologies | 1 | Active |
| US10229080B2 | Dual bus standard switching bus controller | Physics | 1 | Active |
| US7502377B2 | PCI to PCI express protocol conversion | Physics | 1 | Active |
| US9830292B2 | Architected protocol for changing link operating mode | Electricity | 1 | Active |
| US11308018B2 | Virtualized link states of multiple protocol layer package interconnects | Emerging Cross-Sectional Technologies | 1 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.