Integrated circuit simulation with data persistency for efficient memory usage
US10248747B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 5, 2017 |
| Grant date | Apr 2, 2019 |
| Priority date | — |
| Expiry date | Jun 2, 2037 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P90/02
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for simulating an integrated circuit (IC) is provided. The method includes parsing an IC and loading the IC into memory and forming a table model including parameter values for at least one circuit component in the IC, the parameter values selected from a portion of a parameter space, storing a data value associated with the parsing of the IC and the table model in a database accessible through a cloud computing environment, the data value comprising a metadata associated with the data value, loading, to a processor, at least one of the data value or the metadata from the database, modifying the data value or the metadata that is loaded in the processor, according to the portion of the parameter space, and performing an analysis on at least one block of the IC according to the data value or the metadata that is loaded in the processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.