Inventor · San Jose, CA, US

Jaideep Mukherjee

4Patents
1h-index
6Co-inventors
30Inventor score

Filing activity: Mar 31, 2014 → May 5, 2017

Most-cited inventions

PatentTitleAreaCited byStatus
US10248747B1 Integrated circuit simulation with data persistency for efficient memory usage Emerging Cross-Sectional Technologies 2 Active
US9038008B1 System and method for containing analog verification IP Physics 1 Active
US10248745B1 Integrated circuit simulation with variability analysis for efficient memory usage Physics 0 Active
US10303828B1 Integrated circuit simulation with efficient memory usage Emerging Cross-Sectional Technologies 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.