Patent · US Active

Packaged integrated circuit device and methods

US10249557B2 · kind B2 · utility

0Cited by
3References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 23, 2017
Grant dateApr 2, 2019
Priority date
Expiry dateMay 23, 2037

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L23/49558
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A packaged lead frame includes a encapsulant having a first minor side, a second minor side opposite the first minor side, a third minor side, and a fourth minor side opposite the third minor side, and a plurality of leads along the third minor side between the first minor side and a center plane between the first and second minor side. The plurality of leads extend outwardly from the encapsulant at a first plane. Each of the plurality of leads includes a corresponding jog external to the encapsulant which jogs away from the center plane, wherein the corresponding jog of each lead from a first lead of the plurality of leads closest to the center plane to a last lead of the first plurality of leads closest to the first minor side jogs incrementally further away the center plane.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.