Cross-point memory array device and method of manufacturing the same
US10249681B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 30, 2017 |
| Grant date | Apr 2, 2019 |
| Priority date | — |
| Expiry date | Nov 30, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8836
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a cross-point memory array device is disclosed. In the method, a substrate is provided. A plurality of first conductive line patterns are formed over the substrate. An insulating layer is formed over the first conductive line patterns. The insulating layer includes an insulative oxide. A plurality of switching film patterns are formed on the first conductive line patterns by selectively doping a plurality regions of the insulating layer. A plurality of memory structures are formed on the plurality of switching film patterns, respectively. A plurality of second conductive line patterns are formed on the plurality of memory structures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.