Methods of measuring patterns and methods of manufacturing semiconductor devices including the same
US10254236B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Jul 19, 2017 |
| Grant date | Apr 9, 2019 |
| Priority date | — |
| Expiry date | Sep 27, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/27
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method of inspecting patterns formed the manufacturing of semiconductor devices or the like includes producing an image of the patterns, producing a boundary image including a plurality of boundary patterns corresponding to first and second boundaries of each of the patterns, combining the pattern image and the boundary image to produce an overlapping image including overlapping patterns in which the patterns fill regions between the boundary patterns, and binarizing the overlapping image to produce a binary image including binary patterns corresponding to the overlapping patterns.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.