Low inrush circuit for power up and deep power down exit
US10254812B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 28, 2018 |
| Grant date | Apr 9, 2019 |
| Priority date | — |
| Expiry date | Mar 28, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17772
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems, methods, and devices for providing power to low energy circuits include inrush circuits. Devices include a regulator that includes at least one driver device configured to generate a first current associated with a load comprising a low energy integrated circuit. Devices also include a bias generator configured to generate a second current to charge a load capacitor coupled with a power terminal of the low energy integrated circuit. Devices further include an enable circuit configured to enable the bias generator and disable the regulator responsive to a load voltage being below a threshold voltage, and further configured to enable the regulator to generate the first current and disable the bias generator responsive to the load voltage being above the threshold voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.