Jayant Ashokkumar
16Patents
6h-index
21Co-inventors
62Inventor score
Filing activity: Dec 22, 2006 → Mar 11, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7518916B2 | Method and apparatus to program both sides of a non-volatile static random access memory | Physics | 20 | Active |
| US7539054B2 | Method and apparatus to program and erase a non-volatile static random access memory from the bit lines | Physics | 17 | Active |
| US7505303B2 | Method and apparatus to create an erase disturb on a non-volatile static random access memory cell | Physics | 16 | Active |
| US9514816B1 | Non-volatile static RAM and method of operation thereof | Physics | 15 | Active |
| US10074422B1 | 2T1C ferro-electric random access memory cell | Physics | 14 | Active |
| US8315096B2 | Method and apparatus to implement a reset function in a non-volatile static random access memory | Physics | 7 | Active |
| US9438240B1 | Biasing circuit for level shifter with isolation | Physics | 2 | Active |
| US12228594B2 | Glitch free brown out detector | Electricity | 1 | Active |
| US9646694B2 | 10-transistor non-volatile static random-access memory using a single non-volatile memory element and method of operation thereof | Physics | 0 | Active |
| US8559262B2 | Capacitor power source tamper protection and reliability test | Physics | 0 | Active |
| US9866216B1 | Biasing circuit for level shifter with isolation | Physics | 0 | Active |
| US9607695B1 | Multi-bit non-volatile random-access memory cells | Physics | 0 | Active |
| US10254812B1 | Low inrush circuit for power up and deep power down exit | Electricity | 0 | Active |
| US9997237B2 | 10-transistor non-volatile static random-access memory using a single non-volatile memory element and method of operation thereof | Physics | 0 | Active |
| US10332596B2 | 2T1C ferro-electric random access memory cell | Physics | 0 | Active |
| US9620225B2 | Split voltage non-volatile latch cell | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.