Patent · US Active

Dicing method

US10256147B2 · kind B2 · utility

1Cited by
8References
5Claims
0Family size

Assignee

Inventors

Key dates

Filing dateFeb 9, 2015
Grant dateApr 9, 2019
Priority date
Expiry dateFeb 9, 2035

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2224/05569
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

The dicing method comprises the steps of providing a substrate (1) of semiconductor material, the substrate having a main surface (10), where integrated components (3) of chips (13) are arranged, and a rear surface (11) opposite the main surface, fastening a first handling wafer above the main surface, thinning the substrate at the rear surface, and forming trenches (20) penetrating the substrate and separating the chips by a single etching step after the substrate has been thinned.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.