Structures for nitride vertical transistors
US10256352B2 · kind B2 · utility
1Cited by
1References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 22, 2016 |
| Grant date | Apr 9, 2019 |
| Priority date | — |
| Expiry date | Dec 22, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/115
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A vertical semiconductor transistor and a method of forming the same. A vertical semiconductor transistor has at least one semiconductor region, a source, and at least one gate region. The at least one semiconductor region includes a III-nitride semiconductor material. The source is formed over the at least one semiconductor region. The at least one gate region is formed around at least a portion of the at least one semiconductor region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.