Min-Chul Sun
36Patents
8h-index
42Co-inventors
75Inventor score
Filing activity: Oct 30, 2002 → Oct 20, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7679083B2 | Semiconductor integrated test structures for electron beam inspection of semiconductor wafers | Electricity | 97 | Active |
| US7772866B2 | Structure and method of mapping signal intensity to surface voltage for integrated circuit inspection | Electricity | 85 | Active |
| US9087922B2 | Semiconductor devices having vertical device and non-vertical device and methods of forming the same | Electricity | 20 | Active |
| US7084061B2 | Methods of fabricating a semiconductor device having MOS transistor with strained channel | Electricity | 18 | Expired |
| US9570600B2 | Semiconductor structure and recess formation etch technique | Electricity | 14 | Active |
| US9219119B2 | Semiconductor device with nanowires in different regions at different heights and fabricating method thereof | Emerging Cross-Sectional Technologies | 10 | Active |
| US7781322B2 | Nickel alloy salicide transistor structure and method for manufacturing same | Electricity | 8 | Expired |
| US9583583B2 | Semiconductor device with nanowires in different regions at different heights | Emerging Cross-Sectional Technologies | 8 | Active |
| US6797559B2 | Method of fabricating semiconductor device having metal conducting layer | Electricity | 5 | Expired |
| US7232756B2 | Nickel salicide process with reduced dopant deactivation | Electricity | 5 | Expired |
| US10014219B2 | Semiconductor device | Emerging Cross-Sectional Technologies | 3 | Active |
| US10615080B2 | Methods of manufacturing semiconductor devices by etching active fins using etching masks | Electricity | 2 | Active |
| US7307320B2 | Differential mechanical stress-producing regions for integrated circuit field effect transistors | Electricity | 2 | Expired |
| US10529801B2 | Semiconductor device including isolation regions | Electricity | 2 | Active |
| US9461054B2 | Semiconductor devices having vertical device and non-vertical device and methods of forming the same | Electricity | 1 | Active |
| US10256352B2 | Structures for nitride vertical transistors | Electricity | 1 | Active |
| US8557691B2 | Method of fabricating semiconductor device having buried wiring and related device | Electricity | 1 | Active |
| US7501651B2 | Test structure of semiconductor device | Electricity | 1 | Active |
| US8928080B2 | Field-effect transistor having back gate and method of fabricating the same | Electricity | 1 | Active |
| US10964782B2 | Semiconductor device including isolation regions | Electricity | 1 | Active |
| US7005367B2 | Method of fabricating a semiconductor device having a silicon oxide layer, a method of fabricating a semiconductor device having dual spacers, a method of forming a silicon oxide layer on a substrate, and a method of forming dual spacers on a conductive material layer | Electricity | 1 | Expired |
| US7465617B2 | Method of fabricating a semiconductor device having a silicon oxide layer, a method of fabricating a semiconductor device having dual spacers, a method of forming a silicon oxide layer on a substrate, and a method of forming dual spacers on a conductive material layer | Electricity | 1 | Active |
| US7317204B2 | Test structure of semiconductor device | Electricity | 1 | Expired |
| US9343549B2 | Semiconductor device and method for fabricating the same | Electricity | 0 | Active |
| US10109532B2 | Methods of manufacturing finFET semiconductor devices | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.