High voltage fringe-effect capacitor
US10262803B1 · kind B1 · utility
1Cited by
10References
15Claims
0Family size
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Key dates
| Filing date | Oct 9, 2017 |
| Grant date | Apr 16, 2019 |
| Priority date | — |
| Expiry date | Oct 9, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01G4/30
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A multilayer chip capacitor includes electrodes comprised of numerous, closely spaced conductive layers interposed within a dielectric laminate. Adjacent conductive layers are essentially non-overlapping, so that fringe capacitance between opposing electrodes provides substantially all of the capacitance. The conductive layers may be shaped to form a non-planer boundary between electrodes. An additional high frequency integrated capacitor is formed from external electrode plates. The non-planar electrode boundary principle is also applied to discoidal capacitors in the form of a non-concentric electrode boundary.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.