Wafer level package solder barrier used as vacuum getter
US10262913B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 2, 2018 |
| Grant date | Apr 16, 2019 |
| Priority date | — |
| Expiry date | Apr 2, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electronic device and methods of manufacture thereof. One or more methods may include providing a lid wafer having a cavity and a surface surrounding the cavity and a device wafer having a detector device and a reference device. In certain examples, a solder barrier layer of titanium material may be deposited onto the surface of the lid wafer. The solder barrier layer of titanium material may further be activated to function as a getter. In various examples, the lid wafer and the device wafer may be bonded together using solder, and the solder barrier layer of titanium material may prevent the solder from contacting the surface of the lid wafer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.