Inventor · Dallas, TX, US

Thomas A. Kocian

26Patents
5h-index
12Co-inventors
66Inventor score

Filing activity: Jun 12, 1995 → Apr 2, 2018

Most-cited inventions

PatentTitleAreaCited byStatus
US5550398A Hermetic packaging with optical Electricity 57 Expired
US6762868B2 Electro-optical package with drop-in aperture Electricity 54 Expired
US8736045B1 Integrated bondline spacers for wafer level packaged circuit devices Electricity 7 Active
US8809784B2 Incident radiation detector packaging Electricity 6 Active
US7466018B2 MEMS device wafer-level package Electricity 5 Active
US7226810B2 MEMS device wafer-level package Electricity 4 Expired
US8608894B2 Wafer level packaged focal plane array Electricity 4 Active
US9093444B2 Wafer level package solder barrier used as vacuum getter Electricity 3 Active
US8844793B2 Reducing formation of oxide on solder Electricity 3 Active
US6908791B2 MEMS device wafer-level package Electricity 3 Expired
US9022584B2 Protecting an optical surface Emerging Cross-Sectional Technologies 2 Active
US9334154B2 Hermetically sealed package having stress reducing layer Performing Operations; Transporting 1 Active
US9427776B2 Method of stress relief in anti-reflective coated cap wafers for wafer level packaged infrared focal plane arrays Performing Operations; Transporting 1 Active
US9227839B2 Wafer level packaged infrared (IR) focal plane array (FPA) with evanescent wave coupling Performing Operations; Transporting 1 Active
US9132496B2 Reducing formation of oxide on solder Electricity 1 Active
US9105800B2 Method of forming deposited patterns on a surface Performing Operations; Transporting 0 Active
US9969610B2 Wafer level MEMS package including dual seal ring Performing Operations; Transporting 0 Active
US9520332B2 Wafer level package solder barrier used as vacuum getter Electricity 0 Active
US9771258B2 Wafer level MEMS package including dual seal ring Performing Operations; Transporting 0 Active
US9187312B2 Integrated bondline spacers for wafer level packaged circuit devices Electricity 0 Active
US10262913B2 Wafer level package solder barrier used as vacuum getter Electricity 0 Active
US9174836B2 Integrated bondline spacers for wafer level packaged circuit devices Electricity 0 Active
US9196556B2 Getter structure and method for forming such structure Emerging Cross-Sectional Technologies 0 Active
US9708181B2 Hermetically sealed package having stress reducing layer Performing Operations; Transporting 0 Active
US9966320B2 Wafer level package solder barrier used as vacuum getter Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.