High-voltage LDMOSFET devices having polysilicon trench-type guard rings
US10262997B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 14, 2017 |
| Grant date | Apr 16, 2019 |
| Priority date | — |
| Expiry date | Sep 14, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/516
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A high-voltage semiconductor device including a semiconductor layer formed on a substrate is provided. A first well region having a first conductivity type and a second well region having a second conductivity type are formed in the semiconductor layer. Source and drain regions are respectively formed in the first and second well regions. A gate structure is disposed on the semiconductor layer. A first isolation trench structure is disposed in the semiconductor layer and surrounds the first and second well regions. The first isolation trench structure includes a first polysilicon layer filling a first trench and having the second conductivity type, a first heavy doping region formed in an upper portion of the first polysilicon layer and having the second conductivity type, and a first insulating liner disposed on sidewalls of the first trench and surrounding the first polysilicon layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.