Semiconductor chip
US10263143B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 9, 2018 |
| Grant date | Apr 16, 2019 |
| Priority date | — |
| Expiry date | Apr 9, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/824
Abstract
A semiconductor chip (20) is described comprising a semiconductor layer sequence (10) based on a phosphide compound semiconductor material or arsenide compound semiconductor material wherein the semiconductor layer sequence (10) contains a p-type semiconductor region (4) and an n-type semiconductor region (2). The n-type semiconductor region (2) comprises a superlattice structure (20) for improving current spreading, wherein the superlattice structure (20) has a periodic array of semiconductor layers (21, 22, 23, 24). A period of the superlattice structure (20) has at least one undoped first semiconductor layer (21) and a doped second semiconductor layer (22), wherein an electronic band gap E2 of the doped second semiconductor layer (22) is larger than an electronic band gap E1 of the undoped first semiconductor layer (21).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.