Integrated circuits with complementary non-volatile resistive memory elements
US10269426B2 · kind B2 · utility
1Cited by
10References
14Claims
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Key dates
| Filing date | Jun 15, 2017 |
| Grant date | Apr 23, 2019 |
| Priority date | — |
| Expiry date | Jun 15, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/79
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Integrated circuits with memory elements are provided. A memory element may include non-volatile resistive elements coupled together in a back-to-back configuration or an in-line configuration. Erase, programming, and margining operations may be performed on the resistive elements. Each of the resistive memory elements may receive a positive voltage, a ground voltage, or a negative voltage on either the anode or cathode terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.