Vertically integrated three-dimensional CMOS image sensors (3D CIS) bonded with control circuit substrate
US10269852B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jun 26, 2015 |
| Grant date | Apr 23, 2019 |
| Priority date | — |
| Expiry date | Sep 26, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/48091
Abstract
A device includes a first integrated circuit containing a photodiode and a first metal interconnect structure connected to the photodiode, and a second integrated circuit containing a transistor and a second metal interconnect structure connected to the transistor. The first integrated circuit and the second integrated circuit are connected together through the first metal interconnect structure and the second metal interconnect structure. Since no transistor is present around the photodiode, the photodiode has an increased photosensitive area and an improved fill factor, resulting in an increase of the quantum efficiency, higher integration and lower consumption of the image sensor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.