Power transistor device
US10269945B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 18, 2018 |
| Grant date | Apr 23, 2019 |
| Priority date | — |
| Expiry date | Jan 22, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/834
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A power transistor device including a substrate structure, a first conductive layer, a second conductive layer, and a third conductive layer is provided. The substrate structure has a base portion and fin portions. The fin portions protrude from a surface of the base portion. The first conductive layer is disposed across the fin portions and has a first side and a second side opposite to each other. The second conductive layer is disposed across the fin portions and is located at the first side of the first conductive layer. The third conductive layer is disposed across the fin portions and is located at the second side of the first conductive layer. The first conductive layer, the second conductive layer, the third conductive layer, and the fin portions are insulated from each other. An extending direction of the first, second, and third conductive layers intersects a length direction of the fin portions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.