Semiconductor memory device
US10276218B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 26, 2018 |
| Grant date | Apr 30, 2019 |
| Priority date | — |
| Expiry date | Feb 26, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device includes a plurality of memory chips that are stacked above one another and connected to each other through a through via, an interface chip that is connected to the plurality of memory chips, and a plurality of first terminals for connection with an external device. The interface chip includes a plurality of second terminals that are connected to the plurality of first terminals, and is capable of receiving a signal that is supplied from the external device through the first and second terminals, and stores configuration information according to which a set number of the second terminals are designated for receiving control signals for the plurality of memory chips.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.