Data reduction using analog memory
US10276256B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 2, 2018 |
| Grant date | Apr 30, 2019 |
| Priority date | — |
| Expiry date | Mar 2, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01S7/4861
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A device may include a first analog memory device to sample an analog input during a first time window of a sampling window, store a first analog signal based on sampling the analog input, and provide a first analog output after storing the first analog signal. The device may include a second analog memory device to sample the analog input during a second time window of the sampling window, store a second analog signal based on sampling the analog input, and provide a second analog output after storing the second analog signal. An output rate may be different from a sampling rate associated with sampling the analog input. An output order may be different from a sampling order associated with sampling the analog input. A time at which a read-out phase is performed, may be significantly different from a time at which a write phase is performed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.